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Espressif Systems /ESP32-P4 /HP_SYS_CLKRST /HP_RST_EN1

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Interpret as HP_RST_EN1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (REG_RST_EN_PPA)REG_RST_EN_PPA 0 (REG_RST_EN_AHB_PDMA)REG_RST_EN_AHB_PDMA 0 (REG_RST_EN_AXI_PDMA)REG_RST_EN_AXI_PDMA 0 (REG_RST_EN_IOMUX)REG_RST_EN_IOMUX 0 (REG_RST_EN_PADBIST)REG_RST_EN_PADBIST 0 (REG_RST_EN_STIMER)REG_RST_EN_STIMER 0 (REG_RST_EN_TIMERGRP0)REG_RST_EN_TIMERGRP0 0 (REG_RST_EN_TIMERGRP1)REG_RST_EN_TIMERGRP1 0 (REG_RST_EN_UART0_CORE)REG_RST_EN_UART0_CORE 0 (REG_RST_EN_UART1_CORE)REG_RST_EN_UART1_CORE 0 (REG_RST_EN_UART2_CORE)REG_RST_EN_UART2_CORE 0 (REG_RST_EN_UART3_CORE)REG_RST_EN_UART3_CORE 0 (REG_RST_EN_UART4_CORE)REG_RST_EN_UART4_CORE 0 (REG_RST_EN_UART0_APB)REG_RST_EN_UART0_APB 0 (REG_RST_EN_UART1_APB)REG_RST_EN_UART1_APB 0 (REG_RST_EN_UART2_APB)REG_RST_EN_UART2_APB 0 (REG_RST_EN_UART3_APB)REG_RST_EN_UART3_APB 0 (REG_RST_EN_UART4_APB)REG_RST_EN_UART4_APB 0 (REG_RST_EN_UHCI)REG_RST_EN_UHCI 0 (REG_RST_EN_I3CMST)REG_RST_EN_I3CMST 0 (REG_RST_EN_I3CSLV)REG_RST_EN_I3CSLV 0 (REG_RST_EN_I2C1)REG_RST_EN_I2C1 0 (REG_RST_EN_I2C0)REG_RST_EN_I2C0 0 (REG_RST_EN_RMT)REG_RST_EN_RMT 0 (REG_RST_EN_PWM0)REG_RST_EN_PWM0 0 (REG_RST_EN_PWM1)REG_RST_EN_PWM1 0 (REG_RST_EN_CAN0)REG_RST_EN_CAN0 0 (REG_RST_EN_CAN1)REG_RST_EN_CAN1 0 (REG_RST_EN_CAN2)REG_RST_EN_CAN2 0 (REG_RST_EN_LEDC)REG_RST_EN_LEDC 0 (REG_RST_EN_PCNT)REG_RST_EN_PCNT 0 (REG_RST_EN_ETM)REG_RST_EN_ETM

Description

Reserved

Fields

REG_RST_EN_PPA

Reserved
REG_RST_EN_AHB_PDMA

Reserved
REG_RST_EN_AXI_PDMA

Reserved
REG_RST_EN_IOMUX

Reserved
REG_RST_EN_PADBIST

Reserved
REG_RST_EN_STIMER

Reserved
REG_RST_EN_TIMERGRP0

Reserved
REG_RST_EN_TIMERGRP1

Reserved
REG_RST_EN_UART0_CORE

Reserved
REG_RST_EN_UART1_CORE

Reserved
REG_RST_EN_UART2_CORE

Reserved
REG_RST_EN_UART3_CORE

Reserved
REG_RST_EN_UART4_CORE

Reserved
REG_RST_EN_UART0_APB

Reserved
REG_RST_EN_UART1_APB

Reserved
REG_RST_EN_UART2_APB

Reserved
REG_RST_EN_UART3_APB

Reserved
REG_RST_EN_UART4_APB

Reserved
REG_RST_EN_UHCI

Reserved
REG_RST_EN_I3CMST

Reserved
REG_RST_EN_I3CSLV

Reserved
REG_RST_EN_I2C1

Reserved
REG_RST_EN_I2C0

Reserved
REG_RST_EN_RMT

Reserved
REG_RST_EN_PWM0

Reserved
REG_RST_EN_PWM1

Reserved
REG_RST_EN_CAN0

Reserved
REG_RST_EN_CAN1

Reserved
REG_RST_EN_CAN2

Reserved
REG_RST_EN_LEDC

Reserved
REG_RST_EN_PCNT

Reserved
REG_RST_EN_ETM

Reserved

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data